JPH0340501B2 - - Google Patents

Info

Publication number
JPH0340501B2
JPH0340501B2 JP55132850A JP13285080A JPH0340501B2 JP H0340501 B2 JPH0340501 B2 JP H0340501B2 JP 55132850 A JP55132850 A JP 55132850A JP 13285080 A JP13285080 A JP 13285080A JP H0340501 B2 JPH0340501 B2 JP H0340501B2
Authority
JP
Japan
Prior art keywords
film
base contact
base
contact region
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP55132850A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5758356A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP55132850A priority Critical patent/JPS5758356A/ja
Priority to EP81107436A priority patent/EP0052198B1/en
Priority to DE8181107436T priority patent/DE3173316D1/de
Priority to US06/306,223 priority patent/US4398962A/en
Publication of JPS5758356A publication Critical patent/JPS5758356A/ja
Publication of JPH0340501B2 publication Critical patent/JPH0340501B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/051—Manufacture or treatment of vertical BJTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/30—Devices controlled by electric currents or voltages
    • H10D48/32—Devices controlled by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H10D48/34—Bipolar devices
    • H10D48/345—Bipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/092—Laser beam processing-diodes or transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Bipolar Transistors (AREA)
JP55132850A 1980-09-26 1980-09-26 Manufacture of semiconductor device Granted JPS5758356A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP55132850A JPS5758356A (en) 1980-09-26 1980-09-26 Manufacture of semiconductor device
EP81107436A EP0052198B1 (en) 1980-09-26 1981-09-18 Method of manufacturing semiconductor devices using self-alignment techniques
DE8181107436T DE3173316D1 (en) 1980-09-26 1981-09-18 Method of manufacturing semiconductor devices using self-alignment techniques
US06/306,223 US4398962A (en) 1980-09-26 1981-09-28 Method of controlling base contact regions by forming a blocking layer contiguous to a doped poly-si emitter source

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55132850A JPS5758356A (en) 1980-09-26 1980-09-26 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5758356A JPS5758356A (en) 1982-04-08
JPH0340501B2 true JPH0340501B2 (en]) 1991-06-19

Family

ID=15090975

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55132850A Granted JPS5758356A (en) 1980-09-26 1980-09-26 Manufacture of semiconductor device

Country Status (4)

Country Link
US (1) US4398962A (en])
EP (1) EP0052198B1 (en])
JP (1) JPS5758356A (en])
DE (1) DE3173316D1 (en])

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4752817A (en) * 1983-08-26 1988-06-21 International Business Machines Corporation High performance integrated circuit having modified extrinsic base
JPS60258964A (ja) * 1984-06-06 1985-12-20 Hitachi Ltd 半導体装置の製造方法
US5098854A (en) * 1984-07-09 1992-03-24 National Semiconductor Corporation Process for forming self-aligned silicide base contact for bipolar transistor
US5227316A (en) * 1985-01-22 1993-07-13 National Semiconductor Corporation Method of forming self aligned extended base contact for a bipolar transistor having reduced cell size
GB2188479B (en) * 1986-03-26 1990-05-23 Stc Plc Semiconductor devices
JPS62290173A (ja) * 1986-06-09 1987-12-17 Oki Electric Ind Co Ltd 半導体集積回路装置の製造方法
US4974046A (en) * 1986-07-02 1990-11-27 National Seimconductor Corporation Bipolar transistor with polysilicon stringer base contact
US5063168A (en) * 1986-07-02 1991-11-05 National Semiconductor Corporation Process for making bipolar transistor with polysilicon stringer base contact
JPS63182860A (ja) * 1987-01-26 1988-07-28 Toshiba Corp 半導体装置とその製造方法
US4933295A (en) * 1987-05-08 1990-06-12 Raytheon Company Method of forming a bipolar transistor having closely spaced device regions
US4857476A (en) * 1988-01-26 1989-08-15 Hewlett-Packard Company Bipolar transistor process using sidewall spacer for aligning base insert
US5064773A (en) * 1988-12-27 1991-11-12 Raytheon Company Method of forming bipolar transistor having closely spaced device regions
US4992134A (en) * 1989-11-14 1991-02-12 Advanced Micro Devices, Inc. Dopant-independent polysilicon plasma etch
JP3333560B2 (ja) * 1992-10-23 2002-10-15 リコーエレメックス株式会社 シリコン基板のエッチング方法
US6136656A (en) * 1998-10-22 2000-10-24 International Business Machines Corporation Method to create a depleted poly MOSFET
US8791546B2 (en) * 2010-10-21 2014-07-29 Freescale Semiconductor, Inc. Bipolar transistors having emitter-base junctions of varying depths and/or doping concentrations
US9099489B2 (en) 2012-07-10 2015-08-04 Freescale Semiconductor Inc. Bipolar transistor with high breakdown voltage
US9054149B2 (en) * 2012-09-06 2015-06-09 Freescale Semiconductor, Inc. Semiconductor device with diagonal conduction path

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3753807A (en) * 1972-02-24 1973-08-21 Bell Canada Northern Electric Manufacture of bipolar semiconductor devices
US3940288A (en) * 1973-05-16 1976-02-24 Fujitsu Limited Method of making a semiconductor device
JPS51130174A (en) * 1975-05-06 1976-11-12 Matsushita Electric Ind Co Ltd Semiconductor device process
JPS5221774A (en) * 1975-08-12 1977-02-18 Nippon Telegr & Teleph Corp <Ntt> Producing system for transistor
JPS6022506B2 (ja) * 1977-01-24 1985-06-03 日本電気株式会社 半導体装置の製法
NL7703941A (nl) * 1977-04-12 1978-10-16 Philips Nv Werkwijze ter vervaardiging van een halfgelei- derinrichting en inrichting, vervaardigd door toepassing van de werkwijze.
JPS5467778A (en) * 1977-11-10 1979-05-31 Toshiba Corp Production of semiconductor device
US4190466A (en) * 1977-12-22 1980-02-26 International Business Machines Corporation Method for making a bipolar transistor structure utilizing self-passivating diffusion sources
JPS5512754A (en) * 1978-07-13 1980-01-29 Nec Corp Semiconductor device manufacturing method
US4234362A (en) * 1978-11-03 1980-11-18 International Business Machines Corporation Method for forming an insulator between layers of conductive material
US4209350A (en) * 1978-11-03 1980-06-24 International Business Machines Corporation Method for forming diffusions having narrow dimensions utilizing reactive ion etching
US4209349A (en) * 1978-11-03 1980-06-24 International Business Machines Corporation Method for forming a narrow dimensioned mask opening on a silicon body utilizing reactive ion etching
JPS5586151A (en) * 1978-12-23 1980-06-28 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor integrated circuit
US4243435A (en) * 1979-06-22 1981-01-06 International Business Machines Corporation Bipolar transistor fabrication process with an ion implanted emitter
US4211582A (en) * 1979-06-28 1980-07-08 International Business Machines Corporation Process for making large area isolation trenches utilizing a two-step selective etching technique
US4318751A (en) * 1980-03-13 1982-03-09 International Business Machines Corporation Self-aligned process for providing an improved high performance bipolar transistor

Also Published As

Publication number Publication date
EP0052198A2 (en) 1982-05-26
EP0052198B1 (en) 1985-12-27
EP0052198A3 (en) 1983-06-29
JPS5758356A (en) 1982-04-08
US4398962A (en) 1983-08-16
DE3173316D1 (en) 1986-02-06

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